IMPLEMENTATION OF HIGH-RESOLUTION SIGNAL PROCESSING ALGORITHMS ON THE AN/UYS-501 SIGNAL PROCESSING COMPUTER

Authors
  1. Allcott, N.T.
Corporate Authors
Defence Research Establishment Atlantic, Dartmouth NS (CAN)
Abstract
The use of modern signal processing methods for high-resolution spectral analysis and beamforming is currently under study at the Defence Research Establishment Atlantic (DREA). One of the methods being considered is the popular Minimum Variance (MV) high-resolution method. It has been shown that Cholesky matrix factorization can be applied to the data-dependent, adaptive portion of MV, to reduce computational cost. Hence, there is interest in an efficient implementation of Cholesky factorization on currently operational sonar processors, such as the AN/UYS-501 signal processing computer, being used in new Canadian towed array and hull-mounted sonar systems. This report documents a high level language, parallel implementation of the Cholesky matrix factorization algorithm within the AN/UYS-501. As a parallel implementaion of the algorithm results in data-dependent task scheduling or data-precendent execution, this implementation represents a significant challenge to the AN/UYS-501 processor which has not been architecturally optimized for arbitrary data-precedent computation. Although it is demonstrated that such an implementaion is feasible, it is shown that the implementation is inherently limited by the data transfer capacity of the AN/UYS-501. This effectively limits the AN/UYS-501 throughput to a value well below its rated 320 MFLOPS capability.
Keywords
CHOLESKY MATRIX FACTORIZATION;AN/UYS-501;MINIMUM VARIANCE
Report Number
DREA-TM-94-207 — Technical Memoradum 94/207
Date of publication
01 May 1994
Number of Pages
73
DSTKIM No
94-05137
CANDIS No
142368
Format(s):
Hardcopy;Originator's fiche received by DSIS

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