SIGNAL PROCESSING DEMONSTRATOR SYSTEM FOR SPACE-BASED RADAR: DIGITAL SIGNAL PROCESSOR DETAILED DESIGN

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Authors
  1. Knight, T.
  2. Lam, C.
  3. Sawatsky, R.
  4. Tran, S.
  5. Gerbrandt, J.
  6. and others
Corporate Authors
MacDonald Dettwiler and Associates Ltd, Richmond BC (CAN);Defence Research Establishment Ottawa, Ottawa ONT (CAN)
Abstract
This document defines and documents the detailed design for the Digital Signal Processor (DSP) subsystem of the Space-Based Radar (SBR) Signal Processing Demonstrator (SPD). The DSP is a laboratory-based processor for the demonstration and validation of signal processing algorithms and hardware for SBR. The DSP together with the Testbed comprise the SPD. The DSP itself consists of the ECCM Signal Processor (ESP) and the Radar Signal Processor (RSP). The objective of the DSP subsystem is to demonstrate the performance of selected algorithms and hardware implementations to implement the SBR signal processing functions.
Report Number
SB-DS-50-4058;DREO-CR-95-623 — Contractor Report
Date of publication
12 Nov 1993
Number of Pages
934
DSTKIM No
95-04329
CANDIS No
153388
Format(s):
Document Image stored on Optical Disk;Hardcopy

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