PROGRAMMABLE PIPELINE IC REPORT

Authors
Corporate Authors
Calmos Systems Inc, Kanata ONT (CAN);Defence Research Establishment Ottawa, Ottawa ONT (CAN)
Abstract
An integrated circuit has been developed which implements a 32-bit wide pipeline register with 1 to 4 levels of delay.
Date of publication
15 Mar 1987
Number of Pages
33
DSTKIM No
87-02240
CANDIS No
51056
Format(s):
Hardcopy;Originator's fiche received by DSIS

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