FPGA implementation of a baseband MIMO MC-CDMA downlink receiver

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Authors
  1. Nguyen, M-Q.
  2. LaRoche, I.
  3. Fortier, P.
  4. Roy, S.
Corporate Authors
Defence R&D Canada - Ottawa, Ottawa ONT (CAN);Laval Univ, Quebec Que (CAN) Departement de Genie Electrique et de Genie Informatique
Abstract
Orthogonal Frequency Division Multiplexing (OFDM) has become a very attractive multicarrier transmission technique for wireless high speed data communications. OFDM offers robustness to multipath fading without having to provide powerful channel equalization. In order to support multiple users with high speed data communications, the Multi-Carrier Code Division Multiple Access (MC-CDMA) technique is used to address these challenges. MC-CDMA is a combination of OFDM and Code Division Multiple Access (CDMA) and has the benefits of both systems. Thus, the parameters of OFDM become the basic parameters of MC-CDMA. Furthermore, Multi-Input Multi-Ouput (MIMO) was integrated to the MC-CDMA system to improve the bit error rate and data throughput. Simulations were performed for an MC-CDMA system and an MIMO MC-CDMA under different channel environments. The simulation parameters considered were: guard time interval, symbol duration, sampling rate, number of data subcarriers, modulation scheme, number of active users, and number of transmit and receive antennas. The goal of the simulations was to allow for different MIMO MC-CDMA configurations to be tested in order to obtain the best system parameters. The MC-CDMA receiver was implemented into an FPGA development platform based on the simulation results. Finally, the MC-CDMA transceiver was fully tested in a laboratory wireless channel environment. Design size prevented the implementation and live tests of the MIMO MC-CDMA receiver.

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Report Number
DRDC-OTTAWA-CR-2009-145 — Contractor Report (Final)
Date of publication
01 Sep 2009
Number of Pages
166
DSTKIM No
CA032863
CANDIS No
532072
Format(s):
Electronic Document(PDF)

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