REAL-TIME IMPLEMENTATION OF THE CHA ALGORITHM USING AN ARRAY PROCESSOR

Authors
  1. Bosse, E.
Corporate Authors
Communications Research Centre, Ottawa ONT (CAN)
Abstract
Presented in this report, is a study of the implementation of the CHA algorithm on the AP-120B array processor. The study had two main objectives: (1) to investigate the AP-120B's real-time capabilities and (2) to determine the digital noise generated by the AP-120B due to round-off errors. The execution time that was sought for the array procesor was 20 msec per data sample. It was found that a processing time of 13 msec could be achieved if no communications were required between the AP-120B and its host computer was called for. To lessen interaction with the host, a GPIOP (General-purpose Programmable Input Output processor) was used to interact between the AP and external devices. Also, it was found that the digital noise generated by the AP-120B was neglibible when compared to typical radar signal noise.
Report Number
CRC-1422 —
Date of publication
15 Feb 1988
Number of Pages
41
DSTKIM No
88-02480
CANDIS No
55703
Format(s):
Hardcopy;Originator's fiche received by DSIS

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