ELF HARDWARE SYNTHESIS SYSTEM HARDWARE ALLOCATION USER'S GUIDE. VERSION 2.3.0

Authors
  1. Elwood, W.L.
Corporate Authors
Audesyn Inc, Edmonton ALTA (CAN);Chief of Research and Development, Ottawa ONT (CAN) Director of Research and Development Communications and Space
Abstract
The user's guide for the Elf hardware synthesis system. The various steps in the allocation of an EV2 program to a circuit are explained in this document. The user is expected to know how to write an EV2 program before using the allocator. The Elf hardware synthesis system is used to create a circuit from an Euclid version 2 program. Once a valid EV2 file has been written, the allocation of this program, from the Control/Data Flow Graph (CDFG), is possible. Elf will convert the CDFG into an intermediate form of the final circuit known as a circuit graph (CG). The CG is then converted into one of several circuit design formats, suitable for fabrication, simulation, etc.
Report Number
AUTR-89-04 — Technical Report; Contractor Report; See also AUTR-89-05 (DSIS 90-01282)
Date of publication
15 Mar 1989
Number of Pages
76
DSTKIM No
90-01281
CANDIS No
63551
Format(s):
Hardcopy;Originator's fiche received by DSIS

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